1. Field of the Invention
The present invention relates to a digital TV receiver and more particularly to a vestigial sideband mode detecting apparatus in a digital TV receiver.
2. Discussion of Related Art
The vestigial sideband (VSB) mode proposed by the Advanced Television Standard Committee (ATSC) includes 8VSB mode for a terrestrial broadcasting and 16VSB mode for a cable broadcasting. Also, there are 2, 4, 8 and 16VSB modes used for the Multi-channel Multi-point Distribution System (MMDS) channel. The 16VSB of the ATSC and the 16VSB of the MMDS are used in different channels but are transmitted by the same transmission mode and are in the same mode. Consequently, there are currently five VSB modes.
The 2VSB means two codes (one bit) are assigned to one symbol. Similarly, the 4VSB means four codes (two bits) are assigned to one symbol, the 8VSB means eight codes (three bits) are assigned to one symbol, and the 16VSB means sixteen codes (four bits) are assigned to one symbol.
Also, the 2VSB means two codes (one bit) are assigned to one symbol. Similarly, the 4VSB means four codes (two bits) are assigned to one symbol, the 8VSB means eight codes (three bits) are assigned to one symbol, and the 16VSB means sixteen codes (four bits) are assigned to one symbol.
Before transmission from a transmitting side such as a broadcasting station, the signal to be transmitted is passed through a mapper by which the signal is changed into desired power levels. For a ground broadcasting type of 8VSB, the output level of the mapper corresponds to one of 8-step symbol values (amplitude level) xe2x88x927, xe2x88x925, xe2x88x923, xe2x88x921, 1, 3, 5, 7. Moreover, according to predetermined agreement, the mapper forcibly inserts four symbols of a data segment synchronizing (sync) signal for every 832 symbols and forcibly inserts a field sync signal in the position of every 313th data segments.
With two logic levels, a prescribed logic level of the data segment hsync signal xe2x80x981, 0, 0, 1xe2x80x99 is continually repeated in every data segment. The output level of the mapper is xe2x80x98120xe2x80x99 if the data sync signal is in a logic level of xe2x80x981xe2x80x99 and the output level of the mapper is xe2x80x98xe2x88x92120xe2x80x99 if the data segment sync signal is in a logic level of xe2x80x980xe2x80x99. Namely, the data segment sync signal has only the two logic levels, which are continually repeated in every data segment. The data segment and field sync signals are similar to a horizontal and vertical sync signals of the NTSC broadcasting signals, respectively, but do not have the same form.
FIG. 1 is a block diagram of the DTV system. When RF signals modulated according to the VSB system are received through an antenna, a tuner 11 selects a desired channel frequency by tuning and converts the frequency into an IF signal. A frequency-phase locking loop (FPLL) 12 demodulates the IF signal from the tuner 11 into baseband signals I and Q to lock the output phase and frequency. The FPLL 12 is a circuit unifying both a frequency tracking loop and a phase-locking loop, but the frequency is locked prior to the phase.
An analog/digital (A/D) converter 13 converts the I signal into digital data of a given bit number (for example, 10 bits). The Q signal is used for carrier restoration within the FPLL 12. Using the converted digital data of a given bit number, a sync signal recovery unit 14 recovers the synchronization signal to be used for timing recovery and equalization.
The sync signal recovery unit 14 restores the data segment sync signal and the field sync signal, inserted in the RF signal by the transmission side. Namely, the standardized VSB transmission signal includes the specific sync signal patterns within the transmitted data which allows a receiver to easily recover the sync signals. Because the sync signals allow an easy data recovery, an erroneous detection and recovery of the sync signals adversely affect the overall system.
An equalization unit 15 uses the data segment and data field sync signals as training signals in an equalization. The equalization is performed to correct linear distortion of amplitude which causes interference between symbols, and to reduce ghost generated by reflection of the transmitted signal off of mountains and buildings. Afterwards, an error corrector 16 corrects errors that may have occurred during transmission through the channel. A video decoder 17 decodes the equalized and error corrected signal according to the moving picture expert group (MPEG) algorithm, allowing the TV audience to watch a broadcasting through a display.
The digital TV receiver as described above is required for the operation of CATV MMDS as well as terrestrial broadcasting. Thus, a compatibility is necessary, which requires a correct detection of the VSB mode of data currently being received by the digital TV receiver.
However, if the reception channel being used has a large amount of noise, the VSB mode signal would continuously have errors. In such case, the correct VSB mode cannot be detected. This problem occurs especially when severe ghost noise exists in the channel because a same signal would be repeated in every field sync signal section. Moreover, the ghost noise may delay the original signal and add the delayed signal to the current original signal. Thus, a signal with an error due to the effects of the delayed signal may be input during the VSB mode signal section.
If the detected VSB mode is not the correct VSB signal due to a ghost noise existing in the transmission channel, the equalizer 15 and the error corrector 16 would operate using the wrong VSB mode. Particularly, as the equalizer 15 operates mainly using the field sync signal section, an incorrect VSB mode does not significantly affect the operation. This is because the field sync signals for all VSB modes have the same form, although having different magnitudes. However, if an incorrect VSB mode is detected, the error corrector 16 cannot properly restore the data, thereby affecting the operation of the entire digital receiver.
Accordingly, an object of the present invention is to solve at least the problems and disadvantages of the related art.
An object of the present invention is to provide a VSB mode detecting apparatus in a digital TV receiver, which can easily detect a VSB mode even with noise in a channel.
Another object of the present invention is to provide a VSB mode detecting apparatus in a digital TV receiver, which detects a VSB mode using only the code bit of the input digital data.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
To achieve the objects and in accordance with the purposes of the invention, as embodied and broadly described herein, a VSB mode detecting apparatus of a digital TV receiver includes a first and a second VSB mode detectors prior to and after a channel equalizer, in which the first VSB mode detector detects a VSB mode from a pre-channel-equalized signal and the second VSB mode detector detects a VSB mode from a channel-equalized signal. The VSB mode detected by the first VSB mode detector is output to the channel equalizer when the two VSB modes are identical and the VSB mode detected by the second VSB mode detector is output to the channel equalizer otherwise.